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Chapter 1: What’s New for Release 13.1
MicroBlaze Soft Processor
?New version V8.10.a
?Support for 7 Series Kintex and Virtex devices
?AXI now the default interface for 7 Series designs
?MicroBlaze Configuration wizard support Fault Tolerant features
?Added Error Correction Code (ECC) to LMB BRAM memory connected to MicroBlaze
?Added parity protection on MicroBlaze cache and MMU memory
?
New instructions added
?
?
Count Leading Zeros (CLZ)
Memory Barrier (MBAR)
?
?
Stack overflow and underflow detection
New parameter allows AXI4-Stream / FSL instructions in user mode
Embedded IP
?
New Embedded IP
?
?
?
?
AXI 7-Series DDRx
AXI External Peripheral Controller
AXI to AHBLite Bridge
AXI Master Lite IP Interface (IPIF)
?
Embedded IP now available in CORE Generator
?
CORE Generator AXI VDMA
What's New in DSP Edition
The following describes what's new in System Generator for DSP and DSP IP in ISE 13.1.
System Generator for DSP
?
?
?
Support for MATLAB/Simulink 2011a.
All System Generator blocks now support Kintex-7 and Virtex-7 devices.
New blocks
?
7 Series DSP48E1, Complex Multiply 5.0, DSP48 Macro 2.1, FIR Compiler 6.2,
VDMA Interface 3.0.
?
?
?
?
System Generator support for AXI PCore and HW Co-simulation.
New context menus speed adding and connecting blocks (Beta). For details on this
feature, see Chapter 5 of the System Generator for DSP Reference Guide .
Choice to have tools automatic create a Hardware Interface Document. For more
details on this feature, see the System Generator token topic in the System Generator
for DSP Reference Guide .
System Generator IP
?
Floating-point Operator, CORDIC, Divider Generator, CIC Compiler, DSP48
Macro, Multiply-Add, and Multiply-Accumulate.
18
www.xilinx.com
ISE Design Suite 13: Release Notes Guide
UG631 (v 13.1)
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